
The main purpose of defining A-PHY in addition to D-PHY and C-PHY was to maintain high performance over long distances (up to several meters). MIPI A-PHY supports high-speed data rates up to 32Gb/s. This high bandwidth can also be used for machine vision applications to transfer image data from multiple cameras in real-time. Because of its safety relevance, A-PHY data transmission is optimized for low latency, making it ideal for multi-camera inspection systems.

Precise triggering & synchronization
To insert an A-PHY connection between the host-SoC (system on Chip) and multiple cameras, it is necessary to convert the camera serial interface (CSI-2) signal using a SerDes bridge (Serialize/Deserialize). The Serializer converts the CSI-2 signal into an A-PHY signal, while a Deserializer converts the A-PHY signal back into a CSI-2 signal. Developers can then build multi-camera systems with several meters distance between camera and host. Beyond the benefit of a longer cable length, the A-PHY allows to synchronize the clock of all cameras. A clock signal issued by the host is transmitted to all connected cameras, which synchronizes their clocks. As a result, all cameras capture each frame exactly at the same time in free run mode.
Once the clocks are synchronized, it is possible to broadcast more complex trigger signals using PWM, which is a function generator that can be programmed to output a signal with specific characteristics at a specific time. For example, it can be used to trigger all cameras to capture a single frame at the same time, or trigger cameras and/or lights in a precisely defined sequence. PWM is a very powerful tool to precisely program and broadcast sequences of trigger signals in a multi-camera system. However, not all SoCs have this capability on board. There are three architecture options for camera synchronization
Ù The host SoC’s clock capabilities include PWM: In this case, the trigger configuration happens on the host processor. The signals are sent to the SerDes device, transmitted via the A-PHY and converted back by the SerDes device to the cameras, lights or other peripherals. This is an ideal scenario, but unfortunately not the most common one, as most SoCs do not support an internal PWM. Even when an SoC does have this functionality, it will not always have a means to connect to the SerDes and it does not always have the desired quality of service (QoS).
Ù The host SoC’s clock capabilities do not include PWM and neither does the SerDes: If neither the SoC nor the SerDes bridge support PWM, an additional device such as an FPGA or CPLD must be added to the system on the host and/or sensor side to perform the pulse width modulation tasks. This adds complexity to the system, increases development efforts and generates additional hardware costs on the bill of materials.
Ù The host SoC’s clock capabilities do not include PWM but the SerDes does: Some SerDes devices such as Valens‘ VA7000 series have a built-in PWM functionality. This is the most convenient and cost-effective way to overcome the lack of SoC capabilities: no additional hardware or development time is required; the trigger configuration can take place in the SerDes chip on both the host and the sensor side.

Performance depends on PWM implementations
Whether on the SoC, an additional FPGA or the SerDes device, the performance of a multi-camera embedded vision system depends on the performance of its PWM implementation. Key performance indicators are:
Ù How many signal modification options does the PWM offer? As an example, the VA7000 series PWM functions include clock synchronization, broadcast trigger, delayed trigger, and offset trigger between different devices.
Ù How many PWM implementations can be implemented simultaneously? The VA7000 series supports four instances per chipset: four on the Serializer and four on the Deserializer.
Ù How much jitter/latency does the implementation have? With less than 20µs latency, and less than 100ns of jitter, the VA7000 chipsets allow high-speed and high-precision triggering of multiple devices.
Bild: Valens Bild: Valens Bild: Valens Figure 4: Precise clock synchronization with offset output – Bild: Valens Figure 3: Simple and cost effective: SerDes with built-in PWM – Bild: Valens
PWM use cases
One example of implementation of PWM in combination with an A-PHY link is a driver monitoring system onboard a vehicle. The system uses a visible-range camera and an IR camera to constantly monitor the driver’s face and vigilance. The system uses both visible (RGB) and non-visible (IR) sensors in a synchronized manner, so they don’t interfere with each other. This is done by a synchronized offset of the signals. In addition, since the IR sensor LED is power hungry, the ability to control the LED intensity is also required and can be achieved through a PWM signal.